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Analog Design Engineer Resume
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Use this Analog Design Engineer Resume Example with Objective, Technical Skills, Duties, Education and Certification to write your own Analog Design Engineer Resume.
Andrew Adams
4578 Platinum Drive
Bridgeville, PA 15017
(777)-634-5287
a.adams@sampleresume.net
Job Objective:
To join one of the world's top companies as Analog Design Engineer and use my expertise in TSB 65nm, TSMC 90nm, UMC 0.13m, JAZZ, TSMC, IBM 0.18m and CMOS Technologies to produce and deliver high quality analog designs.
Skills:
• Expert in Cadence, Mentor Graphics, Modelsim, PSPICE and HSPICE CAD / EDA Tools
• Proficient in C, C++, PERL, TCL,SQL,UNIX, Assembly Language, Basic JAVA, Matlab, Labview Programming Languages
• Extensive familiarity with Caliber and Assura Verification Tools
• Profound knowledge of physical design of analog and mixed-signal circuits
• Extensive working knowledge of High Speed Digital design and ASIC design
• Strong familiarity with Analog/RF circuits design and simulation
• Competent in TSB 65nm, TSMC 90nm, UMC 0.13m, JAZZ, TSMC, IBM 0.18m CMOS Technologies
• Efficient in VLSI transistor-level CMOS Design
Professional Experience:
Sr. Analog Design Engineer, January 2009 - Present
H. Stern Com. & Ind.,Tyler, TX
Responsibilities:
• Facilitated the Multi-Gigabit Transceiver (MGT) CMOS process modeling design.
• Examined thermal noise in CMOS transistors.
• Designed the Current-steering DAC dynamic calibration.
• Inspected and validated the Colpitts VCO phase.
• Supervised the design of filter and amplifier.
• Supervised a 40 GHz clock recovery chip testing.
Jr. Analog Design Engineer, March 2006 – December 2008
H. Paulin & Co., Limited, Tyler, TX
Responsibilities:
• Presented low power design for DRAM in 45nm TSMC process.
• Administered various TSMC low power SRAM and OTP design.
• Administered UMC low power SRAM design.
• Designed full custom Layouts for analog and mixed-signal ICs at full chip level for PLL, ADC, and DAC.
• Validated RTL coding, timing and analysis of ASIC.
• Facilitated the design of Dual charge pumps PLL, video DAC's and Audio DAC's.
Education:
M.S. in Electrical Engineering, 2006
New Jersey Institute of Technology, Newark, NJ
B.S. in Computer Engineering, 2002
New Jersey Institute of Technology, Newark, NJ
Certifications and Affiliations:
• Certificate in Windows 2000
• Certified Novell Administrator (CNA)
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